From https://www.linkedin.com/pulse/streamlining-functional-changes-dft-aware-eco-gof-heidi-zheng-iapkc
GOF ECO provides a streamlined solution for designers to implement functional changes in digital designs without compromising Design for Testability (DFT) functionality. This article highlights the key features of DFT-friendly ECO and the integrated DFT Design Rule Checking (DRC) capabilities within GOF ECO.
A prime example of GOF DFT DRC's utility is its ability to detect common manual ECO errors. For instance, it can identify instances where the scan shift enable pin is mistakenly tied to a constant value (e.g., zero) instead of being connected to the correct DFT scan shift signal. GOF's DFT DRC effectively catches such errors, as illustrated in Figure 1.
Figure 1: DFT DRC Example
GOF ECO employs several key strategies to ensure DFT integrity during functional ECO implementation:
Preserving DFT Logic: GOF ECO protects DFT logic during functional ECOs by setting it to an inactive state and excluding it from the modification process. This preservation is achieved using APIs such as set_pin_constant, set_net_constant, set_ignore_output, and set_ignore_pin. These APIs effectively isolate DFT logic from unintended changes.
Maintaining Scan Chain Integrity: GOF ECO safeguards the scan chain structure after functional ECOs. When an ECO involves inserting functional logic between flip-flops, GOF ECO offers two solutions:
Managing Clock and Reset Signals: GOF ECO ensures proper control and glitch-free operation of clock and reset signals during test mode. It verifies that these signals are defined as DFT clocks, are controllable in DFT mode, and do not have multiple active paths that could lead to glitches.
Handling DFT Test Points: GOF ECO maintains the functionality and accessibility of DFT test points after functional ECOs. This includes preserving accessibility, constraining test point signals, and performing DFT DRC checks to identify any potential issues.
GOF ECO integrates a robust DFT Design Rule Checker that verifies the integrity of DFT logic after an ECO. The DFT DRC detects a range of potential errors, including:
Broken Scan Chains: ERROR_MULTI_PATHS (Identifies multiple paths within a scan chain, indicating a broken or incorrectly connected chain.)
Scan Chains Ending with Constants: ERROR_END_CONST (Flags scan chains that terminate at a constant value, preventing proper scan operation.)
Scan Chains Ending with Non-Flops/Non-EDT Logic: ERROR_END_AT_INST (Detects scan chains ending at non-sequential elements or non-embedded deterministic test logic.)
DFT Test Points Driven by Non-Controllable Signals: ERROR_DFT_TESTPOINT_DRIVEN (Identifies test points driven by signals that cannot be controlled during testing.)
DFT Test Points with Glitches: ERROR_DFT_TESTPOINT_GLITCH (Detects multiple active paths that could cause glitches on DFT test points.)
Flops Driven by Undefined Clocks: ERROR_CLOCK_UNDEFINED (Flags flip-flops driven by clocks not defined as DFT clocks.)
Reset/Set Glitches on Flops: ERROR_RESET_GLITCH, ERROR_SET_GLITCH (Detects multiple active paths on reset or set pins of flip-flops that could lead to glitches.)
GOF ECO's DFT-aware ECO flow and integrated DFT DRC significantly reduce the risk of introducing DFT-related issues during functional ECO implementation. By preserving DFT logic, maintaining scan chain integrity, and providing comprehensive design rule checks, GOF ECO enables designers to confidently implement functional changes without compromising testability.