IC技术圈期刊 文章分类

类别: FPGA(364) 前端(228) 验证(168) 后端(128) 嵌入式(9) 自动化(21) 模拟(23) 求职就业(163) 管理(11) 软件(26) 按月份
【Vivado那些事】vivado生成.bit文件时报错-ERROR: [Drc 23-20]
#FPGA  #vivado  #错误解决 
ERROR: [Drc 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 3 out of 3 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. Problem ports: clk, din, dout.
OpenFPGA